The making of electrical connections between electronic components has long been accomplished using printed circuit boards (PCBs). The first such circuit boards had only a single routing layer on a top surface thereof for routing electrical signals between electronic components mounted thereon. These single routing layer circuit boards have severe limitations with regard to the number of electrical signals that can be routed between electronic components mounted on the same circuit board. That is, the number of electrical signals that can be routed between electronic components mounted on a single routing layer circuit board is limited by the amount of area on the single routing layer.
The area limitations associated with single routing layer circuit boards led to the development of multilayer PCBs. Such multilayer PCBs may be either single or double-sided and may have multiple routing layers on the surface of and buried within the multilayer PCBs. Thus, such multilayer PCBs have allowed a large increase in the number of electrical signals that may be routed between electronic components mounted on the same circuit board.
The use of multilayer PCBs has been particularly beneficial when using electronic components having high-density packages. That is, electronic components having high-density packages generally require multiple layers of a multilayer PCB to make electrical connections with other electronic components mounted on the same circuit board. In fact, the density of electronic components (more specifically, the density of input/output contacts) typically dictates the number of layers that must be provided by the multilayer PCB upon which the electronic components are mounted. While the number of layers that may be provided by a multilayer PCB is theoretically unlimited, PCB reliability and signal integrity issues result when the number of layers in a multilayer PCB increases the PCB to an undesirable thickness. For example, when making electrical connections between different layers in multilayer PCBs, electrically conductive vias are generally used. While these electrically conductive vias allow direct vertical electrical connections to be made between different layers within a multilayer PCB, there are intrinsic parasitics associated with these electrically conductive vias that can adversely affect the performance of signals propagating therethrough. That is, these electrically conductive vias have intrinsic parasitic resistance, capacitance, and inductance, which can adversely affect signals propagating along each electrically conductive via. In addition, these intrinsic parasitics can also have an adverse effect on the manufacturability of a PCB and thus the cost thereof. Because of their adverse affect on signal performance, these intrinsic parasitics can also limit the bandwidth of signals propagating along each electrically conductive via. These adverse affects only increase as the number of layers in a multilayer PCB increase.
In recognition of the increase in adverse effects on signal integrity as the layer count of a PCB increases, techniques have been developed to provide for “channel routing” within a PCB to reduce the number of layers necessary to provide the requisite electrical connections. An exemplary channel routing technique is described in above-referenced U.S. Pat. No. 6,388,890 issued on May 14, 2002, to Kwong et al., the entirety of which is incorporated by reference herein. Kwong et al. disclose a technique for manufacturing and using a PCB wherein certain vias connecting an electronic component to the PCB extend only through a subset of the layers of the PCB to create channels in the portions of the PCB where vias are absent. These channels then may be used to route a larger number of signal, power, ground and/or test traces between vias thereby reducing the number of layers necessary to provide a certain number of electrical connections for an electronic component.
As the complexity of electronic systems increases, multiple electronic components typically are placed closer together on the surface of a multilayer signal routing device. As a result, as the space between electronic components shrinks, it becomes more difficult to route conductive traces between electronic components (i.e., inter-component conductive traces) from one region of the multilayer signal routing device to another.
In view of the foregoing, it would be desirable to provide a technique for interconnecting multiple electronic components of a multilayer signal routing device that overcomes the above-described inadequacies and shortcomings.